A Novel Huffman Based Compression Method for IP Cores

This paper introduces a new Test Resource Partitioning compression method for Intellectual Property cores. The proposed method compresses the test data supported by the vendor with a new very effective compression scheme based on Huffman code. The compressed data are decompressed on-chip with the use of simple decompression architecture. As it is shown experimentally the proposed method improves the compression ratio compared with other methods, while the hardware overhead of the decompressor is very low and comparable to the most efficient methods in the literature. Moreover, the proposed compression scheme offers a trade-off between compression ratio and area overhead of the decompressor. Finally, it enhances the coverage of unmodeled faults because a large portion of the unknown values of the test set are replaced with pseudorandom data generated by an LFSR.